Parallel Computing

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Research

Research in the parallel computing group is focused on solving compute and memory intensive problems in high speed network processing, data intensive computing and high performance computing. Examples are virtualized packet classification and deep packet inspection for the Internet backbone, large-scale pattern matching, belief propagation and graph inference. We investigate new algorithms and algorithm-architecture mapping to optimize our solutions on parallel and/or heterogeneous architectures including Field-Programmable Gate Arrays (FPGA), general purpose multi-core (CPU) and graphics (GPU) processors.

  • Research Areas
    • Virtualized router architecture
    • Traffic classification
    • High performance, multi-field packet classification
    • Deep packet inspection
    • Parallelism for machine learning
    • Parallelization on cloud platform
  • Current Projects
    • High-performance Data Plane Kernels for Software Defined Networking
    • Accelerating Large Scale Pattern Matching for Data Intensive Applications
    • Parameterized and Tunable Linear Algebra Library for FPGA-Accelerated Systems
    • Hardware-Software Co-Design for Next Generation Packet Forwarding Engines
    • TAPAS: Tunable Algorithms for PERFECT Architectures

Publications

  • Recent publications
  1. Ren Chen and Viktor Prasanna, Energy Optimizations for FPGA-based 2-D FFT Architecture, IEEE 18th International Conference on High Performance Extreme Computing (HPEC '14), September 2014
  2. Sanmukh R. Kuppannagari, Shreyas G. Singapura, Ren Chen, Andrea Sanny, Geoffrey Phi C. Tran, Shijie Zhou, Yusong Hu, Stephen P. Crago, Viktor K. Prasanna, Energy Performance of FPGAs on PERFECT Suite Kernels, IEEE 18th International Conference on High Performance Extreme Computing (HPEC '14), September 2014
  3. Andrea Sanny and Viktor Prasanna, Energy-Efficient Histogram Equalization on FPGA, IEEE 18th International Conference on High Performance Extreme Computing (HPEC '14), September 2014
  4. Yun Qu and Viktor Prasanna, Scalable and Dynamically Updatable Lookup Engine for Decision-trees on FPGA, IEEE 18th International Conference on High Performance Extreme Computing (HPEC '14), September 2014
  5. Shijie Zhou, Shreyas G. Singapura and Viktor K. Prasanna, High-Performance Packet Classification on GPU, IEEE 18th International Conference on High Performance Extreme Computing (HPEC '14), September 2014
  6. Shijie Zhou, Weirong Jiang and Viktor K. Prasanna, A Programmable and Scalable OpenFlow Switch using Heterogeneous SoC Platforms, ACM SIGCOMM Workshop on Hot Topics in Software Defined Networking (HotSDN '14), August 2014
  7. Sanmukh R. Kuppannagari, Yusong Hu and Viktor Prasanna, High Level Performance Model Based Design Space Exploration for Energy-Efficient Designs on FPGAs, IEEE 5th International Green Computing Conference (IGCC '14), November 2014
  8. Ren Chen and Viktor Prasanna, Algorithmic Optimizations for Energy-efficient Throughput-oriented FFT architecture, IEEE 5th International Green Computing Conference (IGCC '14), November 2014
  9. Yun Qu, Shijie Zhou and Viktor Prasanna, Performance Modeling and Optimizations for Decomposition-based Large-scale Packet Classification on Multi-core Processors, IEEE 15th International Conference on High Performance Switching and Routing(HPSR '14), July 2014
  10. Da Tong, Yun Qu and Viktor Prasanna, High-throughput Traffic Classification on Multi-core Processors, IEEE 15th International Conference on High Performance Switching and Routing(HPSR '14), July 2014
  11. Da Tong and Viktor Prasanna, Online heavy hitter detector on FPGA, 2013 IEEE International Conference on Reconfigurable Computing and FPGAs (ReConFig '13), December 2013
  12. Da Tong and Viktor Prasanna, Dynamically Configurable Online Statistical Flow Feature Extractor on FPGA, 2013 IEEE International Conference on High Performance Extreme Computing (HPEC '13), September 2013
  13. Da Tong, Lu Sun, Kiran Matam and Viktor Prasanna High Throughput and Programmable Online Traffic Classifier on FPGA, 2013 the ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA '13), February 2013
  14. Andrea Sanny and Viktor K. Prasanna, Energy-Efficient Median Filter on FPGA, IEEE International Conference on ReConFigurable Computing and FPGAs (ReConFig '13), December 2013
  15. Kiran Kumar Matam and Viktor K. Prasanna, Energy-Efficient Large-Scale Matrix Multiplication on FPGAs, IEEE International Conference on ReConFigurable Computing and FPGAs (ReConFig '13), December 2013
  16. Kiran Kumar Matam, Hoang Le and Viktor K. Prasanna, Evaluating Energy Efficiency of Floating Point Matrix Multiplication on FPGAs, IEEE High Performance Extreme Computing Conference (HPEC '13), September 2013
  17. Kiran Kumar Matam, Hoang Le and Viktor K. Prasanna, Energy Efficient Architecture for Matrix Multiplication on FPGAs, IEEE International Conference on Field Programmable Logic and Applications (FPL '13), August 2013
  18. Kiran Kumar Matam and Viktor K. Prasanna, Algorithm Design Methodology for Embedded Architectures, International Symposium on Applied Reconfigurable Computing (ARC '13), March 2013
  19. Thilan Ganegedara and Viktor K. Prasanna, 100+ Gbps IPv6 Packet Forwarding on Multi-Core Platforms, 2013 IEEE Global Communications Conference (GLOBECOM '13), December 2013 (Best Paper Award)
  20. Ren Chen and Viktor K. Prasanna, Energy-Efficient Architecture for Stride Permutation on Streaming Data, IEEE International Conference on ReConFigurable Computing and FPGAs (ReConFig '13), December 2013
  21. Ren Chen, Neungsoo Park and Viktor K. Prasanna, High Throughput Energy Efficient Parallel FFT Architecture on FPGAs, IEEE High Performance Extreme Computing Conference (HPEC '13), September 2013
  22. Ren Chen, Hoang Le and Viktor K. Prasanna, Energy Efficient Parameterized FFT Architecture, IEEE International Conference on Field Programmable Logic and Applications (FPL '13), August 2013
  23. Yun Qu, Shijie Zhou and Viktor Prasanna, Scalable Many-field Packet Classification on Multi-core Processors, International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD '13), October 2013
  24. Yun Qu, Shijie Zhou and Viktor Prasanna, High-performance Architecture for Dynamically Updatable Packet Classification on FPGA, ACM/IEEE Symposium on Architectures for Networking and Communications Systems (ANCS '13), October 2013
  25. Shijie Zhou, Yun Qu and Viktor Prasanna, Multi-core Implementation of Decomposition-based Packet Classification Algorithms, International Conference on Parallel Computing Techniques (PaCT '13), September 2013
  26. Yi-Hua E. Yang, Yun Qu, Swapnil Haria and Viktor Prasanna, Architecture and Performance Models for Scalable IP Lookup Engines on FPGA, International Conference on High Performance Switching and Routing (HPSR '13), June 2013
  27. Yun Qu and Viktor Prasanna, Fast Dynamically Updatable Packet Classifier on FPGA, International Conference on Field Programmable Logic and Applications (FPL '13), May 2013
  28. Yun Qu and Viktor Prasanna, High-performance Pipelined Architecture for Tree-based IP lookup Engine on FPGA, Reconfigurable Architectures Workshop (RAW '13), January 2013
  29. Andrea Sanny, Thilan Ganegedara and Viktor Prasanna, A Comparison of Ruleset Feature Independent Packet Classification Engines on FPGA, Reconfigurable Architectures Workshop (RAW '13), January 2013
  30. Da Tong, Yi-Hua Yang and Viktor Prasanna, A Memory Efficient IPv6 Lookup Engine on FPGA, 2012 International Conference on Reconfigurable Computing and FPGAs (ReConFig '12), December 2012
  31. Swapnil Haria, Thilan Ganegedara and Viktor Prasanna, Power Efficient and Scalable Virtual Routers on FPGA, International Conference on ReConFigurable Computing and FPGAs (ReConFig '12), December 2012
  32. Nam Ma, Yinglong Xia and Viktor Prasanna, Parallel Exact Inference on Multicore Using MapReduce, 24rd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD '12), October 2012
  33. Weirong Jiang and Viktor K. Prasanna, Scalable Packet Classification on FPGA, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), September 2012
  34. Thilan Ganegedara, Viktor Prasanna and Gordon Brebner, Optimizing Packet Lookup in Time and Space on FPGA, 22nd International Conference on Field Programmable Logic and Applications (FPL '12), August 2012
  35. Yi-Hua E. Yang and Viktor K. Prasanna, High-Performance and Compact Architecture for Regular Expression Matching on FPGA, IEEE Transactions on Computers, July 2012
  36. Yi-Hua E. Yang and Viktor K. Prasanna, Robust and Scalable String Pattern Matching for Deep Packet Inspection on Multi-core Processors, Source Code, IEEE Trans. on Distributed and Parallel Symposium (TDPS), July 2012
  37. Hoang Le and Viktor K. Prasanna, Scalable Tree-based Architectures for IPv4/v6 Lookup Using Prefix Partitioning, IEEE Transactions on Computers, July 2012
  38. Thilan Ganegedara and Viktor Prasanna, StrideBV: Single Chip 400G+ Packet Classification, 13th Conference on High Performance Switching and Routing (HPSR '12), June 2012 (Best Paper Award)
  39. Yun Qu, Yi-Hua E. Yang and Viktor Prasanna, Large-scale Multi-flow Regular Expression Matching on FPGA, 13th Conference on High Performance Switching and Routing (HPSR '12), June 2012
  40. Thilan Ganegedara and Viktor Prasanna, FPGA-based Router Virtualization: A Power Perspective, The 19th Reconfigurable Architectures Workshop (RAW '12), May 2012 (Selected as one of five best papers)
  41. Nam Ma, Yinglong Xia and Viktor Prasanna, Task Parallel Implementation of Belief Propagation in Factor Graphs, Workshop on Parallel and Distributed Computing for Machine Learning and Inference Problems (ParLearning’12 - in conjunction with IPDPS '12), May 2012
  42. Weirong Jiang and Viktor K. Prasanna, Data Structure Optimization for Power-Efficient IP Lookup Architectures, IEEE Transactions on Computers, 2012
  43. Yinglong Xia and Viktor K. Prasanna, Distributed Evidence Propagation in Junction Trees on Clusters, IEEE Transactions on Parallel and Distributed Systems, July 2012
  44. Hoang Le and Viktor K. Prasanna, A Memory-Efficient and Modular Approach for Large-Scale String Pattern Matching, IEEE Transctions on Computers, February 2012
  45. Yun Qu, Yi-Hua E. Yang and Viktor K. Prasanna, Multi-stream Regular Expression Matching on FPGA, 2011 International Conference on ReConFigurable Computing and FPGAs (ReConFig '11), December 2011
  46. Lu Sun, Hoang Le and Viktor K. Prasanna, Optimizing Decomposition-based Packet Classification Implementation on FPGAs, 2011 International Conference on ReConFigurable Computing and FPGAs (ReConFig '11), December 2011 (Best Paper Award Nomination)

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