Research in the parallel computing group is focused on solving compute and memory intensive problems in high speed network processing, data intensive computing and high performance computing. Examples are virtualized packet classification and deep packet inspection for the Internet backbone, large-scale pattern matching, belief propagation and graph inference. We investigate new algorithms and algorithm-architecture mapping to optimize our solutions on parallel and/or heterogeneous architectures including Field-Programmable Gate Arrays (FPGA), general purpose multi-core (CPU) and graphics (GPU) processors.
- Research Areas
- Virtualized router architecture
- Traffic classification
- High performance, multi-field packet classification
- Deep packet inspection
- Parallelism for machine learning
- Parallelization on cloud platform
- Recent publications
- Swapnil Haria, Thilan Ganegedara, Viktor Prasanna, Power Efficient and Scalable Virtual Routers on FPGA, International Conference on ReConFigurable Computing and FPGAs (ReConFig'12), December 2012
- Nam Ma, Yinglong Xia, Viktor Prasanna, Parallel Exact Inference on Multicore Using MapReduce, 24rd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD'12), October 2012.
- Weirong Jiang and Viktor K. Prasanna, Scalable Packet Classification on FPGA, IEEE Transactions on Very Large Scale Integration Systems (TVLSI), September 2012.
- Thilan Ganegedara, Viktor Prasanna, Gordon Brebner, Optimizing Packet Lookup in Time and Space on FPGA, 22nd International Conference on Field Programmable Logic and Applications (FPL 2012), August 2012.
- Yi-Hua E. Yang and Viktor K. Prasanna, High-Performance and Compact Architecture for Regular Expression Matching on FPGA, IEEE Transactions on Computers, July 2012.
- Yi-Hua E. Yang and Viktor K. Prasanna, Robust and Scalable String Pattern Matching for Deep Packet Inspection on Multi-core Processors, Source Code, IEEE Trans. on Distributed and Parallel Symposium (TDPS), July 2012.
- Hoang Le and Viktor K. Prasanna, Scalable Tree-based Architectures for IPv4/v6 Lookup Using Prefix Partitioning, IEEE Transactions on Computers, July 2012.
- Thilan Ganegedara, Viktor Prasanna, StrideBV: Single Chip 400G+ Packet Classification, 13th Conference on High Performance Switching and Routing (HPSR 2012), June 2012.(Best Paper Award)
- Yun Qu, Yi-Hua E. Yang, Viktor Prasanna, Large-scale multi-flow regular expression matching on FPGA, 13th Conference on High Performance Switching and Routing (HPSR 2012), June 2012.
- Thilan Ganegedara, Viktor Prasanna, FPGA-based Router Virtualization: A Power Perspective, The 19th Reconfigurable Architectures Workshop (RAW 2012), May 2012. (Selected as one of five best papers)
- Nam Ma, Yinglong Xia, Viktor Prasanna, Task Parallel Implementation of Belief Propagation in Factor Graphs, Workshop on Parallel and Distributed Computing for Machine Learning and Inference Problems (ParLearning’12 - in conjunction with IPDPS'12), May 2012.
- Weirong Jiang and Viktor K. Prasanna, Data Structure Optimization for Power-Efficient IP Lookup Architectures, IEEE Transactions on Computers, 2012.
- Ren Chen, Ph.D student
- Thilan Ganegedara, Ph.D. student
- Nam Ma, Ph.D. student
- Kiran Matam, Ph.D student
- Yun Rock QU, Ph.D. student
- Andrea Sanny, Ph.D student
- Lucia Sun, Ph.D. student
- Da Tong, Ph.D student
- Shijie Zhou, Ph.D student